CA1230683A - Control circuit for autonomous counters of a plurality of cpu's or the like - Google Patents

Control circuit for autonomous counters of a plurality of cpu's or the like

Info

Publication number
CA1230683A
CA1230683A CA000473045A CA473045A CA1230683A CA 1230683 A CA1230683 A CA 1230683A CA 000473045 A CA000473045 A CA 000473045A CA 473045 A CA473045 A CA 473045A CA 1230683 A CA1230683 A CA 1230683A
Authority
CA
Canada
Prior art keywords
data processing
processing means
autonomous
reset
reset pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000473045A
Other languages
English (en)
French (fr)
Inventor
Yukio Yokoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of CA1230683A publication Critical patent/CA1230683A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function
    • G06F11/0742—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function in a data processing system embedded in a mobile device, e.g. mobile phones, handheld devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
  • Electronic Switches (AREA)
CA000473045A 1984-01-30 1985-01-29 Control circuit for autonomous counters of a plurality of cpu's or the like Expired CA1230683A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14789/1984 1984-01-30
JP59014789A JPS60186919A (ja) 1984-01-30 1984-01-30 オ−トノ−マスタイマ回路

Publications (1)

Publication Number Publication Date
CA1230683A true CA1230683A (en) 1987-12-22

Family

ID=11870819

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000473045A Expired CA1230683A (en) 1984-01-30 1985-01-29 Control circuit for autonomous counters of a plurality of cpu's or the like

Country Status (5)

Country Link
US (1) US5053943A (en])
JP (1) JPS60186919A (en])
AU (1) AU572751B2 (en])
CA (1) CA1230683A (en])
GB (1) GB2153564B (en])

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3731097C2 (de) * 1987-09-16 1996-02-08 Vdo Schindling Schaltungsanordnung zur Überwachung einer von zwei Mikroprozessoren gesteuerten Einrichtung, insbesondere einer Kraftfahrzeug-Elektronik
DE4112334A1 (de) * 1991-04-16 1992-10-22 Bosch Gmbh Robert Mehrrechnersystem in einem kraftfahrzeug
JPH05128080A (ja) * 1991-10-14 1993-05-25 Mitsubishi Electric Corp 情報処理装置
DE4330940A1 (de) * 1993-09-08 1995-03-09 Siemens Ag Verfahren zum Überwachen einer programmgesteuerten Schaltung
GB2305036B (en) * 1994-09-10 1997-08-13 Holtek Microelectronics Inc Reset signal generator
US5734585A (en) * 1994-11-07 1998-03-31 Norand Corporation Method and apparatus for sequencing power delivery in mixed supply computer systems
JP2845800B2 (ja) * 1996-04-12 1999-01-13 静岡日本電気株式会社 無線選択呼出受信機
DE19653551C1 (de) * 1996-12-20 1998-02-05 Siemens Ag Verfahren zur Überprüfung der Funktionsfähigkeit einer Recheneinheit
US6928559B1 (en) * 1997-06-27 2005-08-09 Broadcom Corporation Battery powered device with dynamic power and performance management
US6785888B1 (en) * 1997-08-29 2004-08-31 International Business Machines Corporation Memory allocator for a multiprocessor computer system
US6125404A (en) * 1998-04-17 2000-09-26 Motorola, Inc. Data processing system having a protocol timer for autonomously providing time based interrupts
US20050071688A1 (en) * 2003-09-25 2005-03-31 International Business Machines Corporation Hardware CPU utilization meter for a microprocessor
US20060265703A1 (en) 2005-04-21 2006-11-23 Holt John M Computer architecture and method of operation for multi-computer distributed processing with replicated memory
US20060095483A1 (en) * 2004-04-23 2006-05-04 Waratek Pty Limited Modified computer architecture with finalization of objects
US7844665B2 (en) 2004-04-23 2010-11-30 Waratek Pty Ltd. Modified computer architecture having coordinated deletion of corresponding replicated memory locations among plural computers
US20080133691A1 (en) * 2006-10-05 2008-06-05 Holt John M Contention resolution with echo cancellation
US20080133694A1 (en) * 2006-10-05 2008-06-05 Holt John M Redundant multiple computer architecture
US20080127214A1 (en) * 2006-10-05 2008-05-29 Holt John M Contention detection with counter rollover
US20080133690A1 (en) * 2006-10-05 2008-06-05 Holt John M Contention detection and resolution
US20080140973A1 (en) * 2006-10-05 2008-06-12 Holt John M Contention detection with data consolidation
US7962697B2 (en) * 2006-10-05 2011-06-14 Waratek Pty Limited Contention detection
US20080250221A1 (en) * 2006-10-09 2008-10-09 Holt John M Contention detection with data consolidation
US7702939B2 (en) * 2008-03-19 2010-04-20 Ebm Technologies Incorporated Method and system for controlling an operation time of a computer
CN103838656A (zh) * 2012-11-20 2014-06-04 英业达科技有限公司 计算机系统及其操作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3838261A (en) * 1973-09-14 1974-09-24 Gte Automatic Electric Lab Inc Interrupt control circuit for central processor of digital communication system
JPS548350A (en) * 1977-06-20 1979-01-22 Mitsubishi Electric Corp Elevator controller
US4580243A (en) * 1983-09-14 1986-04-01 Gte Automatic Electric Incorporated Circuit for duplex synchronization of asynchronous signals

Also Published As

Publication number Publication date
US5053943A (en) 1991-10-01
AU3813285A (en) 1985-08-08
GB2153564A (en) 1985-08-21
JPS60186919A (ja) 1985-09-24
GB2153564B (en) 1987-10-14
AU572751B2 (en) 1988-05-12
JPH0351002B2 (en]) 1991-08-05
GB8502289D0 (en) 1985-02-27

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